Constantsยง
- F32X4_
ABS - F32X4_
ADD - F32X4_
CEIL - F32X4_
CONVERT_ I32X4_ S - F32X4_
CONVERT_ I32X4_ U - F32X4_
DEMOTE_ F64X2_ ZERO - F32X4_
DIV - F32X4_
EQ - F32X4_
EXTRACT_ LANE - F32X4_
FLOOR - F32X4_
GE - F32X4_
GT - F32X4_
LE - F32X4_
LT - F32X4_
MAX - F32X4_
MIN - F32X4_
MUL - F32X4_
NE - F32X4_
NEAREST - F32X4_
NEG - F32X4_
PMAX - F32X4_
PMIN - F32X4_
RELAXED_ MADD - Relaxed SIMD Proposal
- F32X4_
RELAXED_ MAX - Relaxed SIMD Proposal
- F32X4_
RELAXED_ MIN - Relaxed SIMD Proposal
- F32X4_
RELAXED_ NMADD - Relaxed SIMD Proposal
- F32X4_
REPLACE_ LANE - F32X4_
SPLAT - F32X4_
SQRT - F32X4_
SUB - F32X4_
TRUNC - F64X2_
ABS - F64X2_
ADD - F64X2_
CEIL - F64X2_
CONVERT_ LOW_ I32X4_ S - F64X2_
CONVERT_ LOW_ I32X4_ U - F64X2_
DIV - F64X2_
EQ - F64X2_
EXTRACT_ LANE - F64X2_
FLOOR - F64X2_
GE - F64X2_
GT - F64X2_
LE - F64X2_
LT - F64X2_
MAX - F64X2_
MIN - F64X2_
MUL - F64X2_
NE - F64X2_
NEAREST - F64X2_
NEG - F64X2_
PMAX - F64X2_
PMIN - F64X2_
PROMOTE_ LOW_ F32X4 - F64X2_
RELAXED_ MADD - Relaxed SIMD Proposal
- F64X2_
RELAXED_ MAX - F64X2_
RELAXED_ MIN - Relaxed SIMD Proposal
- F64X2_
RELAXED_ NMADD - Relaxed SIMD Proposal
- F64X2_
REPLACE_ LANE - F64X2_
SPLAT - F64X2_
SQRT - F64X2_
SUB - F64X2_
TRUNC - I8X16_
ABS - I8X16_
ADD - I8X16_
ADD_ SAT_ S - I8X16_
ADD_ SAT_ U - I8X16_
ALL_ TRUE - I8X16_
AVGR_ U - I8X16_
BITMASK - I8X16_
EQ - I8X16_
EXTRACT_ LANE_ S - I8X16_
EXTRACT_ LANE_ U - I8X16_
GE_ S - I8X16_
GE_ U - I8X16_
GT_ S - I8X16_
GT_ U - I8X16_
LE_ S - I8X16_
LE_ U - I8X16_
LT_ S - I8X16_
LT_ U - I8X16_
MAX_ S - I8X16_
MAX_ U - I8X16_
MIN_ S - I8X16_
MIN_ U - I8X16_
NARROW_ I16X8_ S - I8X16_
NARROW_ I16X8_ U - I8X16_
NE - I8X16_
NEG - I8X16_
POPCNT - I8X16_
RELAXED_ LANESELECT - Relaxed SIMD Proposal
- I8X16_
RELAXED_ SWIZZLE - Relaxed SIMD Proposal
- I8X16_
REPLACE_ LANE - I8X16_
SHL - I8X16_
SHR_ S - I8X16_
SHR_ U - I8X16_
SHUFFLE - I8X16_
SPLAT - I8X16_
SUB - I8X16_
SUB_ SAT_ S - I8X16_
SUB_ SAT_ U - I8X16_
SWIZZLE - I16X8_
ABS - I16X8_
ADD - I16X8_
ADD_ SAT_ S - I16X8_
ADD_ SAT_ U - I16X8_
ALL_ TRUE - I16X8_
AVGR_ U - I16X8_
BITMASK - I16X8_
EQ - I16X8_
EXTADD_ PAIRWISE_ I8X16_ S - I16X8_
EXTADD_ PAIRWISE_ I8X16_ U - I16X8_
EXTEND_ HIGH_ I8X16_ S - I16X8_
EXTEND_ HIGH_ I8X16_ U - I16X8_
EXTEND_ LOW_ I8X16_ S - I16X8_
EXTEND_ LOW_ I8X16_ U - I16X8_
EXTMUL_ HIGH_ I8X16_ S - I16X8_
EXTMUL_ HIGH_ I8X16_ U - I16X8_
EXTMUL_ LOW_ I8X16_ S - I16X8_
EXTMUL_ LOW_ I8X16_ U - I16X8_
EXTRACT_ LANE_ S - I16X8_
EXTRACT_ LANE_ U - I16X8_
GE_ S - I16X8_
GE_ U - I16X8_
GT_ S - I16X8_
GT_ U - I16X8_
LE_ S - I16X8_
LE_ U - I16X8_
LT_ S - I16X8_
LT_ U - I16X8_
MAX_ S - I16X8_
MAX_ U - I16X8_
MIN_ S - I16X8_
MIN_ U - I16X8_
MUL - I16X8_
NARROW_ I32X4_ S - I16X8_
NARROW_ I32X4_ U - I16X8_
NE - I16X8_
NEG - I16X8_
Q15MULRSAT_ S - I16X8_
RELAXED_ LANESELECT - Relaxed SIMD Proposal
- I16X8_
REPLACE_ LANE - I16X8_
SHL - I16X8_
SHR_ S - I16X8_
SHR_ U - I16X8_
SPLAT - I16X8_
SUB - I16X8_
SUB_ SAT_ S - I16X8_
SUB_ SAT_ U - I32X4_
ABS - I32X4_
ADD - I32X4_
ALL_ TRUE - I32X4_
BITMASK - I32X4_
DOT_ I16X8_ S - I32X4_
EQ - I32X4_
EXTADD_ PAIRWISE_ I16X8_ S - I32X4_
EXTADD_ PAIRWISE_ I16X8_ U - I32X4_
EXTEND_ HIGH_ I16X8_ S - I32X4_
EXTEND_ HIGH_ I16X8_ U - I32X4_
EXTEND_ LOW_ I16X8_ S - I32X4_
EXTEND_ LOW_ I16X8_ U - I32X4_
EXTMUL_ HIGH_ I16X8_ S - I32X4_
EXTMUL_ HIGH_ I16X8_ U - I32X4_
EXTMUL_ LOW_ I16X8_ S - I32X4_
EXTMUL_ LOW_ I16X8_ U - I32X4_
EXTRACT_ LANE - I32X4_
GE_ S - I32X4_
GE_ U - I32X4_
GT_ S - I32X4_
GT_ U - I32X4_
LE_ S - I32X4_
LE_ U - I32X4_
LT_ S - I32X4_
LT_ U - I32X4_
MAX_ S - I32X4_
MAX_ U - I32X4_
MIN_ S - I32X4_
MIN_ U - I32X4_
MUL - I32X4_
NE - I32X4_
NEG - I32X4_
RELAXED_ LANESELECT - Relaxed SIMD Proposal
- I32X4_
RELAXED_ TRUNC_ F32X4_ S - Relaxed SIMD Proposal
- I32X4_
RELAXED_ TRUNC_ F32X4_ U - Relaxed SIMD Proposal
- I32X4_
RELAXED_ TRUNC_ F64X2_ S_ ZERO - Relaxed SIMD Proposal
- I32X4_
RELAXED_ TRUNC_ F64X2_ U_ ZERO - Relaxed SIMD Proposal
- I32X4_
REPLACE_ LANE - I32X4_
SHL - I32X4_
SHR_ S - I32X4_
SHR_ U - I32X4_
SPLAT - I32X4_
SUB - I32X4_
TRUNC_ SAT_ F32X4_ S - I32X4_
TRUNC_ SAT_ F32X4_ U - I32X4_
TRUNC_ SAT_ F64X2_ S_ ZERO - I32X4_
TRUNC_ SAT_ F64X2_ U_ ZERO - I64X2_
ABS - I64X2_
ADD - I64X2_
ALL_ TRUE - I64X2_
BITMASK - I64X2_
EQ - I64X2_
EXTEND_ HIGH_ I32X4_ S - I64X2_
EXTEND_ HIGH_ I32X4_ U - I64X2_
EXTEND_ LOW_ I32X4_ S - I64X2_
EXTEND_ LOW_ I32X4_ U - I64X2_
EXTMUL_ HIGH_ I32X4_ S - I64X2_
EXTMUL_ HIGH_ I32X4_ U - I64X2_
EXTMUL_ LOW_ I32X4_ S - I64X2_
EXTMUL_ LOW_ I32X4_ U - I64X2_
EXTRACT_ LANE - I64X2_
GE_ S - I64X2_
GT_ S - I64X2_
LE_ S - I64X2_
LT_ S - I64X2_
MUL - I64X2_
NE - I64X2_
NEG - I64X2_
RELAXED_ LANESELECT - Relaxed SIMD Proposal
- I64X2_
REPLACE_ LANE - I64X2_
SHL - I64X2_
SHR_ S - I64X2_
SHR_ U - I64X2_
SPLAT - I64X2_
SUB - V128_
AND - V128_
ANDNOT - V128_
ANY_ TRUE - V128_
BITSELECT - V128_
CONST - V128_
LOAD - V128_
LOAD8 X8_ S - V128_
LOAD8 X8_ U - V128_
LOAD8_ LANE - V128_
LOAD8_ SPLAT - V128_
LOAD16 X4_ S - V128_
LOAD16 X4_ U - V128_
LOAD16_ LANE - V128_
LOAD16_ SPLAT - V128_
LOAD32 X2_ S - V128_
LOAD32 X2_ U - V128_
LOAD32_ LANE - V128_
LOAD32_ SPLAT - V128_
LOAD32_ ZERO - V128_
LOAD64_ LANE - V128_
LOAD64_ SPLAT - V128_
LOAD64_ ZERO - V128_
NOT - V128_OR
- V128_
STORE - V128_
STOR E8_ LANE - V128_
STOR E16_ LANE - V128_
STOR E32_ LANE - V128_
STOR E64_ LANE - V128_
XOR