1pub const UNREACHABLE: u8 = 0x00;
3pub const NOP: u8 = 0x01;
4pub const BLOCK: u8 = 0x02;
5pub const LOOP: u8 = 0x03;
6pub const IF: u8 = 0x04;
7pub const ELSE: u8 = 0x05;
8pub const END: u8 = 0x0B;
9pub const BR: u8 = 0x0C;
10pub const BR_IF: u8 = 0x0D;
11pub const BR_TABLE: u8 = 0x0E;
12pub const RETURN: u8 = 0x0F;
13pub const CALL: u8 = 0x10;
14pub const DROP: u8 = 0x1A;
15pub const SELECT: u8 = 0x1B;
16pub const SELECT_T: u8 = 0x1C;
17pub const CALL_INDIRECT: u8 = 0x11;
18pub const LOCAL_GET: u8 = 0x20;
19pub const LOCAL_SET: u8 = 0x21;
20pub const LOCAL_TEE: u8 = 0x22;
21pub const GLOBAL_GET: u8 = 0x23;
22pub const GLOBAL_SET: u8 = 0x24;
23pub const TABLE_GET: u8 = 0x25;
24pub const TABLE_SET: u8 = 0x26;
25pub const I32_LOAD: u8 = 0x28;
26pub const I64_LOAD: u8 = 0x29;
27pub const F32_LOAD: u8 = 0x2A;
28pub const F64_LOAD: u8 = 0x2B;
29pub const I32_LOAD8_S: u8 = 0x2C;
30pub const I32_LOAD8_U: u8 = 0x2D;
31pub const I32_LOAD16_S: u8 = 0x2E;
32pub const I32_LOAD16_U: u8 = 0x2F;
33pub const I64_LOAD8_S: u8 = 0x30;
34pub const I64_LOAD8_U: u8 = 0x31;
35pub const I64_LOAD16_S: u8 = 0x32;
36pub const I64_LOAD16_U: u8 = 0x33;
37pub const I64_LOAD32_S: u8 = 0x34;
38pub const I64_LOAD32_U: u8 = 0x35;
39pub const I32_STORE: u8 = 0x36;
40pub const I64_STORE: u8 = 0x37;
41pub const F32_STORE: u8 = 0x38;
42pub const F64_STORE: u8 = 0x39;
43pub const I32_STORE8: u8 = 0x3A;
44pub const I32_STORE16: u8 = 0x3B;
45pub const I64_STORE8: u8 = 0x3C;
46pub const I64_STORE16: u8 = 0x3D;
47pub const I64_STORE32: u8 = 0x3E;
48pub const MEMORY_SIZE: u8 = 0x3F;
49pub const MEMORY_GROW: u8 = 0x40;
50pub const I32_CONST: u8 = 0x41;
51pub const I64_CONST: u8 = 0x42;
52pub const F32_CONST: u8 = 0x43;
53pub const F64_CONST: u8 = 0x44;
54pub const I32_EQZ: u8 = 0x45;
55pub const I32_EQ: u8 = 0x46;
56pub const I32_NE: u8 = 0x47;
57pub const I32_LT_S: u8 = 0x48;
58pub const I32_LT_U: u8 = 0x49;
59pub const I32_GT_S: u8 = 0x4A;
60pub const I32_GT_U: u8 = 0x4B;
61pub const I32_LE_S: u8 = 0x4C;
62pub const I32_LE_U: u8 = 0x4D;
63pub const I32_GE_S: u8 = 0x4E;
64pub const I32_GE_U: u8 = 0x4F;
65pub const I64_EQZ: u8 = 0x50;
66pub const I64_EQ: u8 = 0x51;
67pub const I64_NE: u8 = 0x52;
68pub const I64_LT_S: u8 = 0x53;
69pub const I64_LT_U: u8 = 0x54;
70pub const I64_GT_S: u8 = 0x55;
71pub const I64_GT_U: u8 = 0x56;
72pub const I64_LE_S: u8 = 0x57;
73pub const I64_LE_U: u8 = 0x58;
74pub const I64_GE_S: u8 = 0x59;
75pub const I64_GE_U: u8 = 0x5A;
76pub const F32_EQ: u8 = 0x5B;
77pub const F32_NE: u8 = 0x5C;
78pub const F32_LT: u8 = 0x5D;
79pub const F32_GT: u8 = 0x5E;
80pub const F32_LE: u8 = 0x5F;
81pub const F32_GE: u8 = 0x60;
82pub const F64_EQ: u8 = 0x61;
83pub const F64_NE: u8 = 0x62;
84pub const F64_LT: u8 = 0x63;
85pub const F64_GT: u8 = 0x64;
86pub const F64_LE: u8 = 0x65;
87pub const F64_GE: u8 = 0x66;
88pub const I32_ADD: u8 = 0x6A;
89pub const I32_SUB: u8 = 0x6B;
90pub const I32_MUL: u8 = 0x6C;
91pub const I32_DIV_S: u8 = 0x6D;
92pub const I32_DIV_U: u8 = 0x6E;
93pub const I32_REM_S: u8 = 0x6F;
94pub const I32_CLZ: u8 = 0x67;
95pub const I32_CTZ: u8 = 0x68;
96pub const I32_POPCNT: u8 = 0x69;
97pub const I32_REM_U: u8 = 0x70;
98pub const I32_AND: u8 = 0x71;
99pub const I32_OR: u8 = 0x72;
100pub const I32_XOR: u8 = 0x73;
101pub const I32_SHL: u8 = 0x74;
102pub const I32_SHR_S: u8 = 0x75;
103pub const I32_SHR_U: u8 = 0x76;
104pub const I32_ROTL: u8 = 0x77;
105pub const I32_ROTR: u8 = 0x78;
106pub const I64_CLZ: u8 = 0x79;
107pub const I64_CTZ: u8 = 0x7A;
108pub const I64_POPCNT: u8 = 0x7B;
109pub const I64_ADD: u8 = 0x7C;
110pub const I64_SUB: u8 = 0x7D;
111pub const I64_MUL: u8 = 0x7E;
112pub const I64_DIV_S: u8 = 0x7F;
113pub const I64_DIV_U: u8 = 0x80;
114pub const I64_REM_S: u8 = 0x81;
115pub const I64_REM_U: u8 = 0x82;
116pub const I64_AND: u8 = 0x83;
117pub const I64_OR: u8 = 0x84;
118pub const I64_XOR: u8 = 0x85;
119pub const I64_SHL: u8 = 0x86;
120pub const I64_SHR_S: u8 = 0x87;
121pub const I64_SHR_U: u8 = 0x88;
122pub const I64_ROTL: u8 = 0x89;
123pub const I64_ROTR: u8 = 0x8A;
124pub const F32_ABS: u8 = 0x8B;
125pub const F32_NEG: u8 = 0x8C;
126pub const F32_CEIL: u8 = 0x8D;
127pub const F32_FLOOR: u8 = 0x8E;
128pub const F32_TRUNC: u8 = 0x8F;
129pub const F32_NEAREST: u8 = 0x90;
130pub const F32_SQRT: u8 = 0x91;
131pub const F32_ADD: u8 = 0x92;
132pub const F32_SUB: u8 = 0x93;
133pub const F32_MUL: u8 = 0x94;
134pub const F32_DIV: u8 = 0x95;
135pub const F32_MIN: u8 = 0x96;
136pub const F32_MAX: u8 = 0x97;
137pub const F32_COPYSIGN: u8 = 0x98;
138pub const F64_ABS: u8 = 0x99;
139pub const F64_NEG: u8 = 0x9A;
140pub const F64_CEIL: u8 = 0x9B;
141pub const F64_FLOOR: u8 = 0x9C;
142pub const F64_TRUNC: u8 = 0x9D;
143pub const F64_NEAREST: u8 = 0x9E;
144pub const F64_SQRT: u8 = 0x9F;
145pub const F64_ADD: u8 = 0xA0;
146pub const F64_SUB: u8 = 0xA1;
147pub const F64_MUL: u8 = 0xA2;
148pub const F64_DIV: u8 = 0xA3;
149pub const F64_MIN: u8 = 0xA4;
150pub const F64_MAX: u8 = 0xA5;
151pub const F64_COPYSIGN: u8 = 0xA6;
152pub const I32_WRAP_I64: u8 = 0xA7;
153pub const I32_TRUNC_F32_S: u8 = 0xA8;
154pub const I32_TRUNC_F32_U: u8 = 0xA9;
155pub const I32_TRUNC_F64_S: u8 = 0xAA;
156pub const I32_TRUNC_F64_U: u8 = 0xAB;
157pub const I64_EXTEND_I32_S: u8 = 0xAC;
158pub const I64_EXTEND_I32_U: u8 = 0xAD;
159pub const I64_TRUNC_F32_S: u8 = 0xAE;
160pub const I64_TRUNC_F32_U: u8 = 0xAF;
161pub const I64_TRUNC_F64_S: u8 = 0xB0;
162pub const I64_TRUNC_F64_U: u8 = 0xB1;
163pub const F32_CONVERT_I32_S: u8 = 0xB2;
164pub const F32_CONVERT_I32_U: u8 = 0xB3;
165pub const F32_CONVERT_I64_S: u8 = 0xB4;
166pub const F32_CONVERT_I64_U: u8 = 0xB5;
167pub const F32_DEMOTE_F64: u8 = 0xB6;
168pub const F64_CONVERT_I32_S: u8 = 0xB7;
169pub const F64_CONVERT_I32_U: u8 = 0xB8;
170pub const F64_CONVERT_I64_S: u8 = 0xB9;
171pub const F64_CONVERT_I64_U: u8 = 0xBA;
172pub const F64_PROMOTE_F32: u8 = 0xBB;
173pub const I32_REINTERPRET_F32: u8 = 0xBC;
174pub const I64_REINTERPRET_F64: u8 = 0xBD;
175pub const F32_REINTERPRET_I32: u8 = 0xBE;
176pub const F64_REINTERPRET_I64: u8 = 0xBF;
177pub const REF_NULL: u8 = 0xD0;
178pub const REF_IS_NULL: u8 = 0xD1;
179pub const REF_FUNC: u8 = 0xD2;
180pub const FC_EXTENSIONS: u8 = 0xFC;
181pub const FD_EXTENSIONS: u8 = 0xFD;
182pub const I32_EXTEND8_S: u8 = 0xC0;
183pub const I32_EXTEND16_S: u8 = 0xC1;
184pub const I64_EXTEND8_S: u8 = 0xC2;
185pub const I64_EXTEND16_S: u8 = 0xC3;
186pub const I64_EXTEND32_S: u8 = 0xC4;
187
188pub mod fc_extensions {
189 pub const I32_TRUNC_SAT_F32_S: u32 = 0x00;
190 pub const I32_TRUNC_SAT_F32_U: u32 = 0x01;
191 pub const I32_TRUNC_SAT_F64_S: u32 = 0x02;
192 pub const I32_TRUNC_SAT_F64_U: u32 = 0x03;
193 pub const I64_TRUNC_SAT_F32_S: u32 = 0x04;
194 pub const I64_TRUNC_SAT_F32_U: u32 = 0x05;
195 pub const I64_TRUNC_SAT_F64_S: u32 = 0x06;
196 pub const I64_TRUNC_SAT_F64_U: u32 = 0x07;
197 pub const MEMORY_INIT: u32 = 0x08;
198 pub const DATA_DROP: u32 = 0x09;
199 pub const MEMORY_COPY: u32 = 0x0A;
200 pub const MEMORY_FILL: u32 = 0x0B;
201 pub const TABLE_INIT: u32 = 0x0C;
202 pub const ELEM_DROP: u32 = 0x0D;
203 pub const TABLE_COPY: u32 = 0x0E;
204 pub const TABLE_GROW: u32 = 0x0F;
205 pub const TABLE_SIZE: u32 = 0x10;
206 pub const TABLE_FILL: u32 = 0x11;
207}
208
209pub fn fc_extension_instruction_to_str(instr: u32) -> alloc::borrow::Cow<'static, str> {
210 match instr {
211 0x00 => "I32_TRUNC_SAT_F32_S",
212 0x01 => "I32_TRUNC_SAT_F32_U",
213 0x02 => "I32_TRUNC_SAT_F64_S",
214 0x03 => "I32_TRUNC_SAT_F64_U",
215 0x04 => "I64_TRUNC_SAT_F32_S",
216 0x05 => "I64_TRUNC_SAT_F32_U",
217 0x06 => "I64_TRUNC_SAT_F64_S",
218 0x07 => "I64_TRUNC_SAT_F64_U",
219 0x08 => "MEMORY_INIT",
220 0x09 => "DATA_DROP",
221 0x0A => "MEMORY_COPY",
222 0x0B => "MEMORY_FILL",
223 0x0C => "TABLE_INIT",
224 0x0D => "ELEM_DROP",
225 0x0E => "TABLE_COPY",
226 0x0F => "TABLE_GROW",
227 0x10 => "TABLE_SIZE",
228 0x11 => "TABLE_FILL",
229 instr => return alloc::format!("UNKNOWN({instr:x})").into(),
230 }
231 .into()
232}
233
234pub mod fd_extensions {
235 pub const V128_LOAD: u32 = 0;
236 pub const V128_LOAD8X8_S: u32 = 1;
237 pub const V128_LOAD8X8_U: u32 = 2;
238 pub const V128_LOAD16X4_S: u32 = 3;
239 pub const V128_LOAD16X4_U: u32 = 4;
240 pub const V128_LOAD32X2_S: u32 = 5;
241 pub const V128_LOAD32X2_U: u32 = 6;
242 pub const V128_LOAD8_SPLAT: u32 = 7;
243 pub const V128_LOAD16_SPLAT: u32 = 8;
244 pub const V128_LOAD32_SPLAT: u32 = 9;
245 pub const V128_LOAD64_SPLAT: u32 = 10;
246 pub const V128_STORE: u32 = 11;
247 pub const V128_CONST: u32 = 12;
248 pub const I8X16_SHUFFLE: u32 = 13;
249 pub const I8X16_SWIZZLE: u32 = 14;
250 pub const I8X16_SPLAT: u32 = 15;
251 pub const I16X8_SPLAT: u32 = 16;
252 pub const I32X4_SPLAT: u32 = 17;
253 pub const I64X2_SPLAT: u32 = 18;
254 pub const F32X4_SPLAT: u32 = 19;
255 pub const F64X2_SPLAT: u32 = 20;
256 pub const I8X16_EXTRACT_LANE_S: u32 = 21;
257 pub const I8X16_EXTRACT_LANE_U: u32 = 22;
258 pub const I8X16_REPLACE_LANE: u32 = 23;
259 pub const I16X8_EXTRACT_LANE_S: u32 = 24;
260 pub const I16X8_EXTRACT_LANE_U: u32 = 25;
261 pub const I16X8_REPLACE_LANE: u32 = 26;
262 pub const I32X4_EXTRACT_LANE: u32 = 27;
263 pub const I32X4_REPLACE_LANE: u32 = 28;
264 pub const I64X2_EXTRACT_LANE: u32 = 29;
265 pub const I64X2_REPLACE_LANE: u32 = 30;
266 pub const F32X4_EXTRACT_LANE: u32 = 31;
267 pub const F32X4_REPLACE_LANE: u32 = 32;
268 pub const F64X2_EXTRACT_LANE: u32 = 33;
269 pub const F64X2_REPLACE_LANE: u32 = 34;
270 pub const I8X16_EQ: u32 = 35;
271 pub const I8X16_NE: u32 = 36;
272 pub const I8X16_LT_S: u32 = 37;
273 pub const I8X16_LT_U: u32 = 38;
274 pub const I8X16_GT_S: u32 = 39;
275 pub const I8X16_GT_U: u32 = 40;
276 pub const I8X16_LE_S: u32 = 41;
277 pub const I8X16_LE_U: u32 = 42;
278 pub const I8X16_GE_S: u32 = 43;
279 pub const I8X16_GE_U: u32 = 44;
280 pub const I16X8_EQ: u32 = 45;
281 pub const I16X8_NE: u32 = 46;
282 pub const I16X8_LT_S: u32 = 47;
283 pub const I16X8_LT_U: u32 = 48;
284 pub const I16X8_GT_S: u32 = 49;
285 pub const I16X8_GT_U: u32 = 50;
286 pub const I16X8_LE_S: u32 = 51;
287 pub const I16X8_LE_U: u32 = 52;
288 pub const I16X8_GE_S: u32 = 53;
289 pub const I16X8_GE_U: u32 = 54;
290 pub const I32X4_EQ: u32 = 55;
291 pub const I32X4_NE: u32 = 56;
292 pub const I32X4_LT_S: u32 = 57;
293 pub const I32X4_LT_U: u32 = 58;
294 pub const I32X4_GT_S: u32 = 59;
295 pub const I32X4_GT_U: u32 = 60;
296 pub const I32X4_LE_S: u32 = 61;
297 pub const I32X4_LE_U: u32 = 62;
298 pub const I32X4_GE_S: u32 = 63;
299 pub const I32X4_GE_U: u32 = 64;
300 pub const F32X4_EQ: u32 = 65;
301 pub const F32X4_NE: u32 = 66;
302 pub const F32X4_LT: u32 = 67;
303 pub const F32X4_GT: u32 = 68;
304 pub const F32X4_LE: u32 = 69;
305 pub const F32X4_GE: u32 = 70;
306 pub const F64X2_EQ: u32 = 71;
307 pub const F64X2_NE: u32 = 72;
308 pub const F64X2_LT: u32 = 73;
309 pub const F64X2_GT: u32 = 74;
310 pub const F64X2_LE: u32 = 75;
311 pub const F64X2_GE: u32 = 76;
312 pub const V128_NOT: u32 = 77;
313 pub const V128_AND: u32 = 78;
314 pub const V128_ANDNOT: u32 = 79;
315 pub const V128_OR: u32 = 80;
316 pub const V128_XOR: u32 = 81;
317 pub const V128_BITSELECT: u32 = 82;
318 pub const V128_ANY_TRUE: u32 = 83;
319 pub const V128_LOAD8_LANE: u32 = 84;
320 pub const V128_LOAD16_LANE: u32 = 85;
321 pub const V128_LOAD32_LANE: u32 = 86;
322 pub const V128_LOAD64_LANE: u32 = 87;
323 pub const V128_STORE8_LANE: u32 = 88;
324 pub const V128_STORE16_LANE: u32 = 89;
325 pub const V128_STORE32_LANE: u32 = 90;
326 pub const V128_STORE64_LANE: u32 = 91;
327 pub const V128_LOAD32_ZERO: u32 = 92;
328 pub const V128_LOAD64_ZERO: u32 = 93;
329 pub const F32X4_DEMOTE_F64X2_ZERO: u32 = 94;
330 pub const F64X2_PROMOTE_LOW_F32X4: u32 = 95;
331 pub const I8X16_ABS: u32 = 96;
332 pub const I8X16_NEG: u32 = 97;
333 pub const I8X16_POPCNT: u32 = 98;
334 pub const I8X16_ALL_TRUE: u32 = 99;
335 pub const I8X16_BITMASK: u32 = 100;
336 pub const I8X16_NARROW_I16X8_S: u32 = 101;
337 pub const I8X16_NARROW_I16X8_U: u32 = 102;
338 pub const F32X4_CEIL: u32 = 103;
339 pub const F32X4_FLOOR: u32 = 104;
340 pub const F32X4_TRUNC: u32 = 105;
341 pub const F32X4_NEAREST: u32 = 106;
342 pub const I8X16_SHL: u32 = 107;
343 pub const I8X16_SHR_S: u32 = 108;
344 pub const I8X16_SHR_U: u32 = 109;
345 pub const I8X16_ADD: u32 = 110;
346 pub const I8X16_ADD_SAT_S: u32 = 111;
347 pub const I8X16_ADD_SAT_U: u32 = 112;
348 pub const I8X16_SUB: u32 = 113;
349 pub const I8X16_SUB_SAT_S: u32 = 114;
350 pub const I8X16_SUB_SAT_U: u32 = 115;
351 pub const F64X2_CEIL: u32 = 116;
352 pub const F64X2_FLOOR: u32 = 117;
353 pub const I8X16_MIN_S: u32 = 118;
354 pub const I8X16_MIN_U: u32 = 119;
355 pub const I8X16_MAX_S: u32 = 120;
356 pub const I8X16_MAX_U: u32 = 121;
357 pub const F64X2_TRUNC: u32 = 122;
358 pub const I8X16_AVGR_U: u32 = 123;
359 pub const I16X8_EXTADD_PAIRWISE_I8X16_S: u32 = 124;
360 pub const I16X8_EXTADD_PAIRWISE_I8X16_U: u32 = 125;
361 pub const I32X4_EXTADD_PAIRWISE_I16X8_S: u32 = 126;
362 pub const I32X4_EXTADD_PAIRWISE_I16X8_U: u32 = 127;
363 pub const I16X8_ABS: u32 = 128;
364 pub const I16X8_NEG: u32 = 129;
365 pub const I16X8_Q15MULRSAT_S: u32 = 130;
366 pub const I16X8_ALL_TRUE: u32 = 131;
367 pub const I16X8_BITMASK: u32 = 132;
368 pub const I16X8_NARROW_I32X4_S: u32 = 133;
369 pub const I16X8_NARROW_I32X4_U: u32 = 134;
370 pub const I16X8_EXTEND_LOW_I8X16_S: u32 = 135;
371 pub const I16X8_EXTEND_HIGH_I8X16_S: u32 = 136;
372 pub const I16X8_EXTEND_LOW_I8X16_U: u32 = 137;
373 pub const I16X8_EXTEND_HIGH_I8X16_U: u32 = 138;
374 pub const I16X8_SHL: u32 = 139;
375 pub const I16X8_SHR_S: u32 = 140;
376 pub const I16X8_SHR_U: u32 = 141;
377 pub const I16X8_ADD: u32 = 142;
378 pub const I16X8_ADD_SAT_S: u32 = 143;
379 pub const I16X8_ADD_SAT_U: u32 = 144;
380 pub const I16X8_SUB: u32 = 145;
381 pub const I16X8_SUB_SAT_S: u32 = 146;
382 pub const I16X8_SUB_SAT_U: u32 = 147;
383 pub const F64X2_NEAREST: u32 = 148;
384 pub const I16X8_MUL: u32 = 149;
385 pub const I16X8_MIN_S: u32 = 150;
386 pub const I16X8_MIN_U: u32 = 151;
387 pub const I16X8_MAX_S: u32 = 152;
388 pub const I16X8_MAX_U: u32 = 153;
389 pub const I16X8_AVGR_U: u32 = 155;
391 pub const I16X8_EXTMUL_LOW_I8X16_S: u32 = 156;
392 pub const I16X8_EXTMUL_HIGH_I8X16_S: u32 = 157;
393 pub const I16X8_EXTMUL_LOW_I8X16_U: u32 = 158;
394 pub const I16X8_EXTMUL_HIGH_I8X16_U: u32 = 159;
395 pub const I32X4_ABS: u32 = 160;
396 pub const I32X4_NEG: u32 = 161;
397 pub const I8X16_RELAXED_SWIZZLE: u32 = 162;
399 pub const I32X4_ALL_TRUE: u32 = 163;
400 pub const I32X4_BITMASK: u32 = 164;
401 pub const I32X4_RELAXED_TRUNC_F32X4_S: u32 = 165;
403 pub const I32X4_RELAXED_TRUNC_F32X4_U: u32 = 166;
405 pub const I32X4_EXTEND_LOW_I16X8_S: u32 = 167;
406 pub const I32X4_EXTEND_HIGH_I16X8_S: u32 = 168;
407 pub const I32X4_EXTEND_LOW_I16X8_U: u32 = 169;
408 pub const I32X4_EXTEND_HIGH_I16X8_U: u32 = 170;
409 pub const I32X4_SHL: u32 = 171;
410 pub const I32X4_SHR_S: u32 = 172;
411 pub const I32X4_SHR_U: u32 = 173;
412 pub const I32X4_ADD: u32 = 174;
413 pub const F32X4_RELAXED_MADD: u32 = 175;
415 pub const F32X4_RELAXED_NMADD: u32 = 176;
417 pub const I32X4_SUB: u32 = 177;
418 pub const I8X16_RELAXED_LANESELECT: u32 = 178;
420 pub const I16X8_RELAXED_LANESELECT: u32 = 179;
422 pub const F32X4_RELAXED_MIN: u32 = 180;
424 pub const I32X4_MUL: u32 = 181;
425 pub const I32X4_MIN_S: u32 = 182;
426 pub const I32X4_MIN_U: u32 = 183;
427 pub const I32X4_MAX_S: u32 = 184;
428 pub const I32X4_MAX_U: u32 = 185;
429 pub const I32X4_DOT_I16X8_S: u32 = 186;
430 pub const I32X4_EXTMUL_LOW_I16X8_S: u32 = 188;
432 pub const I32X4_EXTMUL_HIGH_I16X8_S: u32 = 189;
433 pub const I32X4_EXTMUL_LOW_I16X8_U: u32 = 190;
434 pub const I32X4_EXTMUL_HIGH_I16X8_U: u32 = 191;
435 pub const I64X2_ABS: u32 = 192;
436 pub const I64X2_NEG: u32 = 193;
437 pub const I64X2_ALL_TRUE: u32 = 195;
439 pub const I64X2_BITMASK: u32 = 196;
440 pub const I32X4_RELAXED_TRUNC_F64X2_S_ZERO: u32 = 197;
442 pub const I32X4_RELAXED_TRUNC_F64X2_U_ZERO: u32 = 198;
444 pub const I64X2_EXTEND_LOW_I32X4_S: u32 = 199;
445 pub const I64X2_EXTEND_HIGH_I32X4_S: u32 = 200;
446 pub const I64X2_EXTEND_LOW_I32X4_U: u32 = 201;
447 pub const I64X2_EXTEND_HIGH_I32X4_U: u32 = 202;
448 pub const I64X2_SHL: u32 = 203;
449 pub const I64X2_SHR_S: u32 = 204;
450 pub const I64X2_SHR_U: u32 = 205;
451 pub const I64X2_ADD: u32 = 206;
452 pub const F64X2_RELAXED_MADD: u32 = 207;
454 pub const F64X2_RELAXED_NMADD: u32 = 208;
456 pub const I64X2_SUB: u32 = 209;
457 pub const I32X4_RELAXED_LANESELECT: u32 = 210;
459 pub const I64X2_RELAXED_LANESELECT: u32 = 211;
461 pub const F64X2_RELAXED_MIN: u32 = 212;
463 pub const I64X2_MUL: u32 = 213;
464 pub const I64X2_EQ: u32 = 214;
465 pub const I64X2_NE: u32 = 215;
466 pub const I64X2_LT_S: u32 = 216;
467 pub const I64X2_GT_S: u32 = 217;
468 pub const I64X2_LE_S: u32 = 218;
469 pub const I64X2_GE_S: u32 = 219;
470 pub const I64X2_EXTMUL_LOW_I32X4_S: u32 = 220;
471 pub const I64X2_EXTMUL_HIGH_I32X4_S: u32 = 221;
472 pub const I64X2_EXTMUL_LOW_I32X4_U: u32 = 222;
473 pub const I64X2_EXTMUL_HIGH_I32X4_U: u32 = 223;
474 pub const F32X4_ABS: u32 = 224;
475 pub const F32X4_NEG: u32 = 225;
476 pub const F32X4_RELAXED_MAX: u32 = 226;
478 pub const F32X4_SQRT: u32 = 227;
479 pub const F32X4_ADD: u32 = 228;
480 pub const F32X4_SUB: u32 = 229;
481 pub const F32X4_MUL: u32 = 230;
482 pub const F32X4_DIV: u32 = 231;
483 pub const F32X4_MIN: u32 = 232;
484 pub const F32X4_MAX: u32 = 233;
485 pub const F32X4_PMIN: u32 = 234;
486 pub const F32X4_PMAX: u32 = 235;
487 pub const F64X2_ABS: u32 = 236;
488 pub const F64X2_NEG: u32 = 237;
489 pub const F64X2_RELAXED_MAX: u32 = 238;
491 pub const F64X2_SQRT: u32 = 239;
492 pub const F64X2_ADD: u32 = 240;
493 pub const F64X2_SUB: u32 = 241;
494 pub const F64X2_MUL: u32 = 242;
495 pub const F64X2_DIV: u32 = 243;
496 pub const F64X2_MIN: u32 = 244;
497 pub const F64X2_MAX: u32 = 245;
498 pub const F64X2_PMIN: u32 = 246;
499 pub const F64X2_PMAX: u32 = 247;
500 pub const I32X4_TRUNC_SAT_F32X4_S: u32 = 248;
501 pub const I32X4_TRUNC_SAT_F32X4_U: u32 = 249;
502 pub const F32X4_CONVERT_I32X4_S: u32 = 250;
503 pub const F32X4_CONVERT_I32X4_U: u32 = 251;
504 pub const I32X4_TRUNC_SAT_F64X2_S_ZERO: u32 = 252;
505 pub const I32X4_TRUNC_SAT_F64X2_U_ZERO: u32 = 253;
506 pub const F64X2_CONVERT_LOW_I32X4_S: u32 = 254;
507 pub const F64X2_CONVERT_LOW_I32X4_U: u32 = 255;
508}
509
510pub fn fd_extension_instruction_to_str(instr: u32) -> alloc::borrow::Cow<'static, str> {
511 use fd_extensions::*;
512
513 match instr {
514 V128_LOAD => "V128_LOAD",
515 V128_LOAD8X8_S => "V128_LOAD8X8_S",
516 V128_LOAD8X8_U => "V128_LOAD8X8_U",
517 V128_LOAD16X4_S => "V128_LOAD16X4_S",
518 V128_LOAD16X4_U => "V128_LOAD16X4_U",
519 V128_LOAD32X2_S => "V128_LOAD32X2_S",
520 V128_LOAD32X2_U => "V128_LOAD32X2_U",
521 V128_LOAD8_SPLAT => "V128_LOAD8_SPLAT",
522 V128_LOAD16_SPLAT => "V128_LOAD16_SPLAT",
523 V128_LOAD32_SPLAT => "V128_LOAD32_SPLAT",
524 V128_LOAD64_SPLAT => "V128_LOAD64_SPLAT",
525 V128_STORE => "V128_STORE",
526 V128_CONST => "V128_CONST",
527 I8X16_SHUFFLE => "I8X16_SHUFFLE",
528 I8X16_SWIZZLE => "I8X16_SWIZZLE",
529 I8X16_SPLAT => "I8X16_SPLAT",
530 I16X8_SPLAT => "I16X8_SPLAT",
531 I32X4_SPLAT => "I32X4_SPLAT",
532 I64X2_SPLAT => "I64X2_SPLAT",
533 F32X4_SPLAT => "F32X4_SPLAT",
534 F64X2_SPLAT => "F64X2_SPLAT",
535 I8X16_EXTRACT_LANE_S => "I8X16_EXTRACT_LANE_S",
536 I8X16_EXTRACT_LANE_U => "I8X16_EXTRACT_LANE_U",
537 I8X16_REPLACE_LANE => "I8X16_REPLACE_LANE",
538 I16X8_EXTRACT_LANE_S => "I16X8_EXTRACT_LANE_S",
539 I16X8_EXTRACT_LANE_U => "I16X8_EXTRACT_LANE_U",
540 I16X8_REPLACE_LANE => "I16X8_REPLACE_LANE",
541 I32X4_EXTRACT_LANE => "I32X4_EXTRACT_LANE",
542 I32X4_REPLACE_LANE => "I32X4_REPLACE_LANE",
543 I64X2_EXTRACT_LANE => "I64X2_EXTRACT_LANE",
544 I64X2_REPLACE_LANE => "I64X2_REPLACE_LANE",
545 F32X4_EXTRACT_LANE => "F32X4_EXTRACT_LANE",
546 F32X4_REPLACE_LANE => "F32X4_REPLACE_LANE",
547 F64X2_EXTRACT_LANE => "F64X2_EXTRACT_LANE",
548 F64X2_REPLACE_LANE => "F64X2_REPLACE_LANE",
549 I8X16_EQ => "I8X16_EQ",
550 I8X16_NE => "I8X16_NE",
551 I8X16_LT_S => "I8X16_LT_S",
552 I8X16_LT_U => "I8X16_LT_U",
553 I8X16_GT_S => "I8X16_GT_S",
554 I8X16_GT_U => "I8X16_GT_U",
555 I8X16_LE_S => "I8X16_LE_S",
556 I8X16_LE_U => "I8X16_LE_U",
557 I8X16_GE_S => "I8X16_GE_S",
558 I8X16_GE_U => "I8X16_GE_U",
559 I16X8_EQ => "I16X8_EQ",
560 I16X8_NE => "I16X8_NE",
561 I16X8_LT_S => "I16X8_LT_S",
562 I16X8_LT_U => "I16X8_LT_U",
563 I16X8_GT_S => "I16X8_GT_S",
564 I16X8_GT_U => "I16X8_GT_U",
565 I16X8_LE_S => "I16X8_LE_S",
566 I16X8_LE_U => "I16X8_LE_U",
567 I16X8_GE_S => "I16X8_GE_S",
568 I16X8_GE_U => "I16X8_GE_U",
569 I32X4_EQ => "I32X4_EQ",
570 I32X4_NE => "I32X4_NE",
571 I32X4_LT_S => "I32X4_LT_S",
572 I32X4_LT_U => "I32X4_LT_U",
573 I32X4_GT_S => "I32X4_GT_S",
574 I32X4_GT_U => "I32X4_GT_U",
575 I32X4_LE_S => "I32X4_LE_S",
576 I32X4_LE_U => "I32X4_LE_U",
577 I32X4_GE_S => "I32X4_GE_S",
578 I32X4_GE_U => "I32X4_GE_U",
579 F32X4_EQ => "F32X4_EQ",
580 F32X4_NE => "F32X4_NE",
581 F32X4_LT => "F32X4_LT",
582 F32X4_GT => "F32X4_GT",
583 F32X4_LE => "F32X4_LE",
584 F32X4_GE => "F32X4_GE",
585 F64X2_EQ => "F64X2_EQ",
586 F64X2_NE => "F64X2_NE",
587 F64X2_LT => "F64X2_LT",
588 F64X2_GT => "F64X2_GT",
589 F64X2_LE => "F64X2_LE",
590 F64X2_GE => "F64X2_GE",
591 V128_NOT => "V128_NOT",
592 V128_AND => "V128_AND",
593 V128_ANDNOT => "V128_ANDNOT",
594 V128_OR => "V128_OR",
595 V128_XOR => "V128_XOR",
596 V128_BITSELECT => "V128_BITSELECT",
597 V128_ANY_TRUE => "V128_ANY_TRUE",
598 V128_LOAD8_LANE => "V128_LOAD8_LANE",
599 V128_LOAD16_LANE => "V128_LOAD16_LANE",
600 V128_LOAD32_LANE => "V128_LOAD32_LANE",
601 V128_LOAD64_LANE => "V128_LOAD64_LANE",
602 V128_STORE8_LANE => "V128_STORE8_LANE",
603 V128_STORE16_LANE => "V128_STORE16_LANE",
604 V128_STORE32_LANE => "V128_STORE32_LANE",
605 V128_STORE64_LANE => "V128_STORE64_LANE",
606 V128_LOAD32_ZERO => "V128_LOAD32_ZERO",
607 V128_LOAD64_ZERO => "V128_LOAD64_ZERO",
608 F32X4_DEMOTE_F64X2_ZERO => "F32X4_DEMOTE_F64X2_ZERO",
609 F64X2_PROMOTE_LOW_F32X4 => "F64X2_PROMOTE_LOW_F32X4",
610 I8X16_ABS => "I8X16_ABS",
611 I8X16_NEG => "I8X16_NEG",
612 I8X16_POPCNT => "I8X16_POPCNT",
613 I8X16_ALL_TRUE => "I8X16_ALL_TRUE",
614 I8X16_BITMASK => "I8X16_BITMASK",
615 I8X16_NARROW_I16X8_S => "I8X16_NARROW_I16X8_S",
616 I8X16_NARROW_I16X8_U => "I8X16_NARROW_I16X8_U",
617 F32X4_CEIL => "F32X4_CEIL",
618 F32X4_FLOOR => "F32X4_FLOOR",
619 F32X4_TRUNC => "F32X4_TRUNC",
620 F32X4_NEAREST => "F32X4_NEAREST",
621 I8X16_SHL => "I8X16_SHL",
622 I8X16_SHR_S => "I8X16_SHR_S",
623 I8X16_SHR_U => "I8X16_SHR_U",
624 I8X16_ADD => "I8X16_ADD",
625 I8X16_ADD_SAT_S => "I8X16_ADD_SAT_S",
626 I8X16_ADD_SAT_U => "I8X16_ADD_SAT_U",
627 I8X16_SUB => "I8X16_SUB",
628 I8X16_SUB_SAT_S => "I8X16_SUB_SAT_S",
629 I8X16_SUB_SAT_U => "I8X16_SUB_SAT_U",
630 F64X2_CEIL => "F64X2_CEIL",
631 F64X2_FLOOR => "F64X2_FLOOR",
632 I8X16_MIN_S => "I8X16_MIN_S",
633 I8X16_MIN_U => "I8X16_MIN_U",
634 I8X16_MAX_S => "I8X16_MAX_S",
635 I8X16_MAX_U => "I8X16_MAX_U",
636 F64X2_TRUNC => "F64X2_TRUNC",
637 I8X16_AVGR_U => "I8X16_AVGR_U",
638 I16X8_EXTADD_PAIRWISE_I8X16_S => "I16X8_EXTADD_PAIRWISE_I8X16_S",
639 I16X8_EXTADD_PAIRWISE_I8X16_U => "I16X8_EXTADD_PAIRWISE_I8X16_U",
640 I32X4_EXTADD_PAIRWISE_I16X8_S => "I32X4_EXTADD_PAIRWISE_I16X8_S",
641 I32X4_EXTADD_PAIRWISE_I16X8_U => "I32X4_EXTADD_PAIRWISE_I16X8_U",
642 I16X8_ABS => "I16X8_ABS",
643 I16X8_NEG => "I16X8_NEG",
644 I16X8_Q15MULRSAT_S => "I16X8_Q15MULRSAT_S",
645 I16X8_ALL_TRUE => "I16X8_ALL_TRUE",
646 I16X8_BITMASK => "I16X8_BITMASK",
647 I16X8_NARROW_I32X4_S => "I16X8_NARROW_I32X4_S",
648 I16X8_NARROW_I32X4_U => "I16X8_NARROW_I32X4_U",
649 I16X8_EXTEND_LOW_I8X16_S => "I16X8_EXTEND_LOW_I8X16_S",
650 I16X8_EXTEND_HIGH_I8X16_S => "I16X8_EXTEND_HIGH_I8X16_S",
651 I16X8_EXTEND_LOW_I8X16_U => "I16X8_EXTEND_LOW_I8X16_U",
652 I16X8_EXTEND_HIGH_I8X16_U => "I16X8_EXTEND_HIGH_I8X16_U",
653 I16X8_SHL => "I16X8_SHL",
654 I16X8_SHR_S => "I16X8_SHR_S",
655 I16X8_SHR_U => "I16X8_SHR_U",
656 I16X8_ADD => "I16X8_ADD",
657 I16X8_ADD_SAT_S => "I16X8_ADD_SAT_S",
658 I16X8_ADD_SAT_U => "I16X8_ADD_SAT_U",
659 I16X8_SUB => "I16X8_SUB",
660 I16X8_SUB_SAT_S => "I16X8_SUB_SAT_S",
661 I16X8_SUB_SAT_U => "I16X8_SUB_SAT_U",
662 F64X2_NEAREST => "F64X2_NEAREST",
663 I16X8_MUL => "I16X8_MUL",
664 I16X8_MIN_S => "I16X8_MIN_S",
665 I16X8_MIN_U => "I16X8_MIN_U",
666 I16X8_MAX_S => "I16X8_MAX_S",
667 I16X8_MAX_U => "I16X8_MAX_U",
668 I16X8_AVGR_U => "I16X8_AVGR_U",
669 I16X8_EXTMUL_LOW_I8X16_S => "I16X8_EXTMUL_LOW_I8X16_S",
670 I16X8_EXTMUL_HIGH_I8X16_S => "I16X8_EXTMUL_HIGH_I8X16_S",
671 I16X8_EXTMUL_LOW_I8X16_U => "I16X8_EXTMUL_LOW_I8X16_U",
672 I16X8_EXTMUL_HIGH_I8X16_U => "I16X8_EXTMUL_HIGH_I8X16_U",
673 I32X4_ABS => "I32X4_ABS",
674 I32X4_NEG => "I32X4_NEG",
675 I8X16_RELAXED_SWIZZLE => "I8X16_RELAXED_SWIZZLE",
676 I32X4_ALL_TRUE => "I32X4_ALL_TRUE",
677 I32X4_BITMASK => "I32X4_BITMASK",
678 I32X4_RELAXED_TRUNC_F32X4_S => "I32X4_RELAXED_TRUNC_F32X4_S",
679 I32X4_RELAXED_TRUNC_F32X4_U => "I32X4_RELAXED_TRUNC_F32X4_U",
680 I32X4_EXTEND_LOW_I16X8_S => "I32X4_EXTEND_LOW_I16X8_S",
681 I32X4_EXTEND_HIGH_I16X8_S => "I32X4_EXTEND_HIGH_I16X8_S",
682 I32X4_EXTEND_LOW_I16X8_U => "I32X4_EXTEND_LOW_I16X8_U",
683 I32X4_EXTEND_HIGH_I16X8_U => "I32X4_EXTEND_HIGH_I16X8_U",
684 I32X4_SHL => "I32X4_SHL",
685 I32X4_SHR_S => "I32X4_SHR_S",
686 I32X4_SHR_U => "I32X4_SHR_U",
687 I32X4_ADD => "I32X4_ADD",
688 F32X4_RELAXED_MADD => "F32X4_RELAXED_MADD",
689 F32X4_RELAXED_NMADD => "F32X4_RELAXED_NMADD",
690 I32X4_SUB => "I32X4_SUB",
691 I8X16_RELAXED_LANESELECT => "I8X16_RELAXED_LANESELECT",
692 I16X8_RELAXED_LANESELECT => "I16X8_RELAXED_LANESELECT",
693 F32X4_RELAXED_MIN => "F32X4_RELAXED_MIN",
694 I32X4_MUL => "I32X4_MUL",
695 I32X4_MIN_S => "I32X4_MIN_S",
696 I32X4_MIN_U => "I32X4_MIN_U",
697 I32X4_MAX_S => "I32X4_MAX_S",
698 I32X4_MAX_U => "I32X4_MAX_U",
699 I32X4_DOT_I16X8_S => "I32X4_DOT_I16X8_S",
700 I32X4_EXTMUL_LOW_I16X8_S => "I32X4_EXTMUL_LOW_I16X8_S",
701 I32X4_EXTMUL_HIGH_I16X8_S => "I32X4_EXTMUL_HIGH_I16X8_S",
702 I32X4_EXTMUL_LOW_I16X8_U => "I32X4_EXTMUL_LOW_I16X8_U",
703 I32X4_EXTMUL_HIGH_I16X8_U => "I32X4_EXTMUL_HIGH_I16X8_U",
704 I64X2_ABS => "I64X2_ABS",
705 I64X2_NEG => "I64X2_NEG",
706 I64X2_ALL_TRUE => "I64X2_ALL_TRUE",
707 I64X2_BITMASK => "I64X2_BITMASK",
708 I32X4_RELAXED_TRUNC_F64X2_S_ZERO => "I32X4_RELAXED_TRUNC_F64X2_S_ZERO",
709 I32X4_RELAXED_TRUNC_F64X2_U_ZERO => "I32X4_RELAXED_TRUNC_F64X2_U_ZERO",
710 I64X2_EXTEND_LOW_I32X4_S => "I64X2_EXTEND_LOW_I32X4_S",
711 I64X2_EXTEND_HIGH_I32X4_S => "I64X2_EXTEND_HIGH_I32X4_S",
712 I64X2_EXTEND_LOW_I32X4_U => "I64X2_EXTEND_LOW_I32X4_U",
713 I64X2_EXTEND_HIGH_I32X4_U => "I64X2_EXTEND_HIGH_I32X4_U",
714 I64X2_SHL => "I64X2_SHL",
715 I64X2_SHR_S => "I64X2_SHR_S",
716 I64X2_SHR_U => "I64X2_SHR_U",
717 I64X2_ADD => "I64X2_ADD",
718 F64X2_RELAXED_MADD => "F64X2_RELAXED_MADD",
719 F64X2_RELAXED_NMADD => "F64X2_RELAXED_NMADD",
720 I64X2_SUB => "I64X2_SUB",
721 I32X4_RELAXED_LANESELECT => "I32X4_RELAXED_LANESELECT",
722 I64X2_RELAXED_LANESELECT => "I64X2_RELAXED_LANESELECT",
723 F64X2_RELAXED_MIN => "F64X2_RELAXED_MIN",
724 I64X2_MUL => "I64X2_MUL",
725 I64X2_EQ => "I64X2_EQ",
726 I64X2_NE => "I64X2_NE",
727 I64X2_LT_S => "I64X2_LT_S",
728 I64X2_GT_S => "I64X2_GT_S",
729 I64X2_LE_S => "I64X2_LE_S",
730 I64X2_GE_S => "I64X2_GE_S",
731 I64X2_EXTMUL_LOW_I32X4_S => "I64X2_EXTMUL_LOW_I32X4_S",
732 I64X2_EXTMUL_HIGH_I32X4_S => "I64X2_EXTMUL_HIGH_I32X4_S",
733 I64X2_EXTMUL_LOW_I32X4_U => "I64X2_EXTMUL_LOW_I32X4_U",
734 I64X2_EXTMUL_HIGH_I32X4_U => "I64X2_EXTMUL_HIGH_I32X4_U",
735 F32X4_ABS => "F32X4_ABS",
736 F32X4_NEG => "F32X4_NEG",
737 F32X4_RELAXED_MAX => "F32X4_RELAXED_MAX",
738 F32X4_SQRT => "F32X4_SQRT",
739 F32X4_ADD => "F32X4_ADD",
740 F32X4_SUB => "F32X4_SUB",
741 F32X4_MUL => "F32X4_MUL",
742 F32X4_DIV => "F32X4_DIV",
743 F32X4_MIN => "F32X4_MIN",
744 F32X4_MAX => "F32X4_MAX",
745 F32X4_PMIN => "F32X4_PMIN",
746 F32X4_PMAX => "F32X4_PMAX",
747 F64X2_ABS => "F64X2_ABS",
748 F64X2_NEG => "F64X2_NEG",
749 F64X2_RELAXED_MAX => "F64X2_RELAXED_MAX",
750 F64X2_SQRT => "F64X2_SQRT",
751 F64X2_ADD => "F64X2_ADD",
752 F64X2_SUB => "F64X2_SUB",
753 F64X2_MUL => "F64X2_MUL",
754 F64X2_DIV => "F64X2_DIV",
755 F64X2_MIN => "F64X2_MIN",
756 F64X2_MAX => "F64X2_MAX",
757 F64X2_PMIN => "F64X2_PMIN",
758 F64X2_PMAX => "F64X2_PMAX",
759 I32X4_TRUNC_SAT_F32X4_S => "I32X4_TRUNC_SAT_F32X4_S",
760 I32X4_TRUNC_SAT_F32X4_U => "I32X4_TRUNC_SAT_F32X4_U",
761 F32X4_CONVERT_I32X4_S => "F32X4_CONVERT_I32X4_S",
762 F32X4_CONVERT_I32X4_U => "F32X4_CONVERT_I32X4_U",
763 I32X4_TRUNC_SAT_F64X2_S_ZERO => "I32X4_TRUNC_SAT_F64X2_S_ZERO",
764 I32X4_TRUNC_SAT_F64X2_U_ZERO => "I32X4_TRUNC_SAT_F64X2_U_ZERO",
765 F64X2_CONVERT_LOW_I32X4_S => "F64X2_CONVERT_LOW_I32X4_S",
766 F64X2_CONVERT_LOW_I32X4_U => "F64X2_CONVERT_LOW_I32X4_U",
767 instr => return alloc::format!("UNKNOWN({instr:x})").into(),
768 }
769 .into()
770}
771
772pub fn instruction_byte_to_str(byte: u8) -> alloc::borrow::Cow<'static, str> {
773 match byte {
774 UNREACHABLE => "UNREACHABLE",
775 NOP => "NOP",
776 BLOCK => "BLOCK",
777 LOOP => "LOOP",
778 IF => "IF",
779 ELSE => "ELSE",
780 END => "END",
781 BR => "BR",
782 BR_IF => "BR_IF",
783 BR_TABLE => "BR_TABLE",
784 RETURN => "RETURN",
785 CALL => "CALL",
786 CALL_INDIRECT => "CALL_INDIRECT",
787 DROP => "DROP",
788 SELECT => "SELECT",
789 SELECT_T => "SELECT_T",
790 LOCAL_GET => "LOCAL_GET",
791 LOCAL_SET => "LOCAL_SET",
792 LOCAL_TEE => "LOCAL_TEE",
793 GLOBAL_GET => "GLOBAL_GET",
794 GLOBAL_SET => "GLOBAL_SET",
795 TABLE_GET => "TABLE_GET",
796 TABLE_SET => "TABLE_SET",
797 I32_LOAD => "I32_LOAD",
798 I64_LOAD => "I64_LOAD",
799 F32_LOAD => "F32_LOAD",
800 F64_LOAD => "F64_LOAD",
801 I32_LOAD8_S => "I32_LOAD8_S",
802 I32_LOAD8_U => "I32_LOAD8_U",
803 I32_LOAD16_S => "I32_LOAD16_S",
804 I32_LOAD16_U => "I32_LOAD16_U",
805 I64_LOAD8_S => "I64_LOAD8_S",
806 I64_LOAD8_U => "I64_LOAD8_U",
807 I64_LOAD16_S => "I64_LOAD16_S",
808 I64_LOAD16_U => "I64_LOAD16_U",
809 I64_LOAD32_S => "I64_LOAD32_S",
810 I64_LOAD32_U => "I64_LOAD32_U",
811 I32_STORE => "I32_STORE",
812 I64_STORE => "I64_STORE",
813 F32_STORE => "F32_STORE",
814 F64_STORE => "F64_STORE",
815 I32_STORE8 => "I32_STORE8",
816 I32_STORE16 => "I32_STORE16",
817 I64_STORE8 => "I64_STORE8",
818 I64_STORE16 => "I64_STORE16",
819 I64_STORE32 => "I64_STORE32",
820 MEMORY_SIZE => "MEMORY_SIZE",
821 MEMORY_GROW => "MEMORY_GROW",
822 I32_CONST => "I32_CONST",
823 I64_CONST => "I64_CONST",
824 F32_CONST => "F32_CONST",
825 F64_CONST => "F64_CONST",
826 I32_EQZ => "I32_EQZ",
827 I32_EQ => "I32_EQ",
828 I32_NE => "I32_NE",
829 I32_LT_S => "I32_LT_S",
830 I32_LT_U => "I32_LT_U",
831 I32_GT_S => "I32_GT_S",
832 I32_GT_U => "I32_GT_U",
833 I32_LE_S => "I32_LE_S",
834 I32_LE_U => "I32_LE_U",
835 I32_GE_S => "I32_GE_S",
836 I32_GE_U => "I32_GE_U",
837 I64_EQZ => "I64_EQZ",
838 I64_EQ => "I64_EQ",
839 I64_NE => "I64_NE",
840 I64_LT_S => "I64_LT_S",
841 I64_LT_U => "I64_LT_U",
842 I64_GT_S => "I64_GT_S",
843 I64_GT_U => "I64_GT_U",
844 I64_LE_S => "I64_LE_S",
845 I64_LE_U => "I64_LE_U",
846 I64_GE_S => "I64_GE_S",
847 I64_GE_U => "I64_GE_U",
848 F32_EQ => "F32_EQ",
849 F32_NE => "F32_NE",
850 F32_LT => "F32_LT",
851 F32_GT => "F32_GT",
852 F32_LE => "F32_LE",
853 F32_GE => "F32_GE",
854 F64_EQ => "F64_EQ",
855 F64_NE => "F64_NE",
856 F64_LT => "F64_LT",
857 F64_GT => "F64_GT",
858 F64_LE => "F64_LE",
859 F64_GE => "F64_GE",
860 I32_CLZ => "I32_CLZ",
861 I32_CTZ => "I32_CTZ",
862 I32_POPCNT => "I32_POPCNT",
863 I32_ADD => "I32_ADD",
864 I32_SUB => "I32_SUB",
865 I32_MUL => "I32_MUL",
866 I32_DIV_S => "I32_DIV_S",
867 I32_DIV_U => "I32_DIV_U",
868 I32_REM_S => "I32_REM_S",
869 I32_REM_U => "I32_REM_U",
870 I32_AND => "I32_AND",
871 I32_OR => "I32_OR",
872 I32_XOR => "I32_XOR",
873 I32_SHL => "I32_SHL",
874 I32_SHR_S => "I32_SHR_S",
875 I32_SHR_U => "I32_SHR_U",
876 I32_ROTL => "I32_ROTL",
877 I32_ROTR => "I32_ROTR",
878 I64_CLZ => "I64_CLZ",
879 I64_CTZ => "I64_CTZ",
880 I64_POPCNT => "I64_POPCNT",
881 I64_ADD => "I64_ADD",
882 I64_SUB => "I64_SUB",
883 I64_MUL => "I64_MUL",
884 I64_DIV_S => "I64_DIV_S",
885 I64_DIV_U => "I64_DIV_U",
886 I64_REM_S => "I64_REM_S",
887 I64_REM_U => "I64_REM_U",
888 I64_AND => "I64_AND",
889 I64_OR => "I64_OR",
890 I64_XOR => "I64_XOR",
891 I64_SHL => "I64_SHL",
892 I64_SHR_S => "I64_SHR_S",
893 I64_SHR_U => "I64_SHR_U",
894 I64_ROTL => "I64_ROTL",
895 I64_ROTR => "I64_ROTR",
896 F32_ABS => "F32_ABS",
897 F32_NEG => "F32_NEG",
898 F32_CEIL => "F32_CEIL",
899 F32_FLOOR => "F32_FLOOR",
900 F32_TRUNC => "F32_TRUNC",
901 F32_NEAREST => "F32_NEAREST",
902 F32_SQRT => "F32_SQRT",
903 F32_ADD => "F32_ADD",
904 F32_SUB => "F32_SUB",
905 F32_MUL => "F32_MUL",
906 F32_DIV => "F32_DIV",
907 F32_MIN => "F32_MIN",
908 F32_MAX => "F32_MAX",
909 F32_COPYSIGN => "F32_COPYSIGN",
910 F64_ABS => "F64_ABS",
911 F64_NEG => "F64_NEG",
912 F64_CEIL => "F64_CEIL",
913 F64_FLOOR => "F64_FLOOR",
914 F64_TRUNC => "F64_TRUNC",
915 F64_NEAREST => "F64_NEAREST",
916 F64_SQRT => "F64_SQRT",
917 F64_ADD => "F64_ADD",
918 F64_SUB => "F64_SUB",
919 F64_MUL => "F64_MUL",
920 F64_DIV => "F64_DIV",
921 F64_MIN => "F64_MIN",
922 F64_MAX => "F64_MAX",
923 F64_COPYSIGN => "F64_COPYSIGN",
924 I32_WRAP_I64 => "I32_WRAP_I64",
925 I32_TRUNC_F32_S => "I32_TRUNC_F32_S",
926 I32_TRUNC_F32_U => "I32_TRUNC_F32_U",
927 I32_TRUNC_F64_S => "I32_TRUNC_F64_S",
928 I32_TRUNC_F64_U => "I32_TRUNC_F64_U",
929 I64_EXTEND_I32_S => "I64_EXTEND_I32_S",
930 I64_EXTEND_I32_U => "I64_EXTEND_I32_U",
931 I64_TRUNC_F32_S => "I64_TRUNC_F32_S",
932 I64_TRUNC_F32_U => "I64_TRUNC_F32_U",
933 I64_TRUNC_F64_S => "I64_TRUNC_F64_S",
934 I64_TRUNC_F64_U => "I64_TRUNC_F64_U",
935 F32_CONVERT_I32_S => "F32_CONVERT_I32_S",
936 F32_CONVERT_I32_U => "F32_CONVERT_I32_U",
937 F32_CONVERT_I64_S => "F32_CONVERT_I64_S",
938 F32_CONVERT_I64_U => "F32_CONVERT_I64_U",
939 F32_DEMOTE_F64 => "F32_DEMOTE_F64",
940 F64_CONVERT_I32_S => "F64_CONVERT_I32_S",
941 F64_CONVERT_I32_U => "F64_CONVERT_I32_U",
942 F64_CONVERT_I64_S => "F64_CONVERT_I64_S",
943 F64_CONVERT_I64_U => "F64_CONVERT_I64_U",
944 F64_PROMOTE_F32 => "F64_PROMOTE_F32",
945 I32_REINTERPRET_F32 => "I32_REINTERPRET_F32",
946 I64_REINTERPRET_F64 => "I64_REINTERPRET_F64",
947 F32_REINTERPRET_I32 => "F32_REINTERPRET_I32",
948 F64_REINTERPRET_I64 => "F64_REINTERPRET_I64",
949 REF_NULL => "REF_NULL",
950 REF_IS_NULL => "REF_IS_NULL",
951 REF_FUNC => "REF_FUNC",
952 FC_EXTENSIONS => "FC_EXTENSIONS",
953 I32_EXTEND8_S => "I32_EXTEND8_S",
954 I32_EXTEND16_S => "I32_EXTEND16_S",
955 I64_EXTEND8_S => "I64_EXTEND8_S",
956 I64_EXTEND16_S => "I64_EXTEND16_S",
957 I64_EXTEND32_S => "I64_EXTEND32_S",
958 instr => return alloc::format!("UNKNOWN({instr:x})").into(),
959 }
960 .into()
961}